At DAC in June 2010, industry experts at AMD, LSI Corporation, Renesas Electronics, Samsung, STMicroelectronics and Texas Instruments presented to over 200 Synopsys guests. The presenters explained how they relied on In-design physical verification with IC Validator for improved productivity and faster design closure.
John Chilton, Moderator, Sr. VP of Marketing & Corporate Development, Synopsys -- Antun Domic, Sr. VP and General Manager of the Implementation Business Unit, Synopsys -- Davide Casalotto, Design Methodologies Project Leader, STMicroelectronics -- Ed Roseboom, Member, Technical Staff, AMD -- Kyle Peavy, Physical Design Engineer, Texas Instruments -- Koki Tsurusaki, Senior Engineer, Back-end Design Technology Development Dept., Platform Integration Division , Renesas Electronics -- Tom Luczejko, Director, Principal Engineer, LSI Corporation -- Harpreet Gill Sr. Engineering Manager, System LSI SoC R&D, Samsung Electronics

In March 2009, SNUG (Synopsys User Group) San Jose drew a large crowd of Synopsys users who gathered to hear from others about their experiences presented in papers, tutorials, and panels. The videos below provide you with a brief overview from customers who presented at San Jose SNUG. Visit the SNUG website for a complete list of IC Compiler papers and presentations. This DAC 2008 event provided an opportunity for members of the electronic design community to learn more about customer design successes with IC Compiler. The event drew a capacity crowd as guest speakers from ARM, Intel, STMicroelectronics, Texas Instruments, and Toshiba shared their experiences from a variety of high-end designs utilizing the latest technology advances in IC Compiler: Concurrent Hierarchical Design, MinChip technology, DFM and IC Compiler’s new Zroute routing technology.
Philip Watson, Implementation Environment Program Manager; Raj Varada, Principal Engineer; Naveen Raina, Technical Specialist & Mutsunori Igarashi, Chief Specialist, Design Methodology Development.

Combine advanced routing algorithms with multi-threading technology, and you get a speed increase of >10X on quad-core machines.
Tong Gao, Synopsys Scientist and architect of Zroute