| Time | Description |
| 8:00-9:00 | Registration and Breakfast |
| 9:00-9:20 | Welcome and Introduction:
Frank Poppen - OFFIS Institute for Information Technology & SNUG Europe Technical Chair |
| 9:20-10:00 | Program Preview:
Peter Rothenaicher - Synopsys GmbH Senior Technical Manager |
| 10:00-10:30 | Break |
| 10:30-12:00 | A1 Tutorial &
User Paper
Implementation: Synthesis | A2 User Session
Implementation: Place & Route I | A3 Tutorial &
User Paper
Verification & IP: Digital Verification | A4 User Paper
& Tutorial
AMS/Full Custom: AMS Verification I | A5 User Session & Tutorial
System: High Level Synthesis & Verification | A6 Tutorial &
Demo Session
Automotive: Introduction & Overview |
| 12:00-13:15 | Lunch |
| 13:15-14:45 | B1 User Session
Signoff: STA and Constraint Analysis | B2 Tutorials
Implementation: Place and Route II | B3 Tutorial &
User Session
Verification & IP:
IP integration | B4 Tutorial & Demo Session
AMS/Full Custom: AMS Verification II | B5 User Paper
& Tutorial
System: SoC Architecture Design | B6 Combo Session
Automotive: Automotive System Design & Analysis |
| 14:45-15:00 | Break |
| 15:00-16:30 | C1 Tutorial &
User Session
Implementation: Low Power | C2 User Paper & Tutorial/Demo
Test: Compression and Volume Diagnostics | C3 Tutorial
Verification & IP: Processor Cores | C4 User Paper
& Tutorial
AMS / Full Custom: Analog Implementation | C5 User Paper
& Tutorial
FPGA: HW Assisted Verification | C6 Combo Session
Automotive: Virtual Prototyping of HW/SW Systems |
| 16:30-18:30 | Sponsor Expo, Awards & Refreshments |